Job Information
ASIC Verification Engineer
In-TAC Jay Ottawa, Canada 112 Days Ago
Job Category: Computer/IT
Job Type: Full-Time
Posted: 2019-05-28
Job Status
Start Publishing: 2019-05-28
Stop Publishing: 2019-06-28
In-TAC Jay Ottawa, Canada
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  • All aspects of block or full chip verification including infrastructure / environment development, test plan development and execution, coverage closure and reviews

  • Verification flow and methodology enhancements

  • Definition, development and execution of ASIC/FPGA bring-up and validation plans
  • Bachelor's degree in CS/EE. Masters degree preferred.
  • 3+ years of experience in ASIC/FPGA Verification.
  • Knowledge of SystemVerilog, C/C++, and scripting languages like Python or Perl
  • Exposure to UVM methodology
  • Familiarity with assertions and functional coverage
  • Excellent communication skills and ability to work in a geographically diverse team environment.
  • Knowledge of DSP / FEC is a plus
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